From b20e0435d951df15797ebe2a604f50de59543527 Mon Sep 17 00:00:00 2001 From: Martin Poghosyan Date: Wed, 26 Apr 2023 15:07:26 +0200 Subject: [PATCH 1/2] [EMCAL-834] Checking active links per trigger --- .../workflow/src/RawToCellConverterSpec.cxx | 43 +++++++++++++++++-- 1 file changed, 39 insertions(+), 4 deletions(-) diff --git a/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx b/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx index bc7e574080cd3..ec05c451221c8 100644 --- a/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx +++ b/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx @@ -12,6 +12,7 @@ #include #include #include +#include #include @@ -42,6 +43,7 @@ #include "SimulationDataFormat/MCCompLabel.h" #include "SimulationDataFormat/MCTruthContainer.h" #include "CommonUtils/VerbosityConfig.h" +#include "EMCALCalib/FeeDCS.h" using namespace o2::emcal::reco_workflow; @@ -103,10 +105,22 @@ void RawToCellConverterSpec::init(framework::InitContext& ctx) void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) { + LOG(debug) << "[EMCALRawToCellConverter - run] called"; mCalibHandler->checkUpdates(ctx); updateCalibrationObjects(); + FeeDCS* feedcs = mCalibHandler->getFEEDCS(); + std::bitset<32> list0 = feedcs->getDDLlist0(); + std::bitset<14> list1 = feedcs->getDDLlist1(); + // links 21 and 39 do not exist, but they are set active in DCS + list0.set(21, false); + list1.set(7, false); + // must be 0x307FFFDFFFFF if all links are active + std::bitset<46> bitSetActiveLinks((list1.to_ullong() << 32) + list0.to_ullong()); + // container with BCid and feeID + std::unordered_map> bcFreq; + double timeshift = RecoParam::Instance().getCellTimeShiftNanoSec(); // subtract offset in ns in order to center the time peak around the nominal delay constexpr auto originEMC = o2::header::gDataOriginEMC; constexpr auto descRaw = o2::header::gDataDescriptionRawData; @@ -167,6 +181,12 @@ void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) auto feeID = raw::RDHUtils::getFEEID(header); auto triggerbits = raw::RDHUtils::getTriggerType(header); + ULong64_t BCcoll = ULong64_t(triggerBC) + ULong64_t(triggerOrbit * 3564); + bcFreq[BCcoll].set(feeID, true); + + // std::cout << "__ BCcoll=" << BCcoll << " FEEID=" << feeID << std::endl; + // LOG(info) << "__ BCcoll=" << BCcoll << " FEEID=" << feeID << std::endl; + int correctionShiftBCmod4 = 0; o2::InteractionRecord currentIR(triggerBC, triggerOrbit); // Correct physics triggers for the shift of the BC due to the LM-L0 delay @@ -338,6 +358,21 @@ void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) mOutputTriggerRecords.emplace_back(interaction, currentevent.getTriggerBits(), eventstart, ncellsEvent + nLEDMONsEvent); } + std::unordered_map>::iterator p; + for (p = bcFreq.begin(); p != bcFreq.end(); p++) { + if (p->second != bitSetActiveLinks) { + LOG(error) << "Not all EMC active links contributed in global BCid=" << p->first << ": mask=" << (p->second ^ bitSetActiveLinks); + mOutputCells.clear(); + mOutputTriggerRecords.clear(); + mOutputDecoderErrors.clear(); + sendData(ctx, mOutputCells, mOutputTriggerRecords, mOutputDecoderErrors); + bcFreq.clear(); + return; + } + } + + bcFreq.clear(); + LOG(info) << "[EMCALRawToCellConverter - run] Writing " << mOutputCells.size() << " cells from " << mOutputTriggerRecords.size() << " events ..."; sendData(ctx, mOutputCells, mOutputTriggerRecords, mOutputDecoderErrors); } @@ -355,9 +390,9 @@ void RawToCellConverterSpec::updateCalibrationObjects() LOG(info) << "RecoParams updated"; o2::emcal::RecoParam::Instance().printKeyValues(true, true); } - // if (mCalibHandler->hasUpdateFEEDCS()) { - // LOG(info) << "DCS params updated"; - // } + if (mCalibHandler->hasUpdateFEEDCS()) { + LOG(info) << "DCS params updated"; + } } bool RawToCellConverterSpec::isLostTimeframe(framework::ProcessingContext& ctx) const @@ -677,7 +712,7 @@ o2::framework::DataProcessorSpec o2::emcal::reco_workflow::getRawToCellConverter // CCDB objects auto calibhandler = std::make_shared(); calibhandler->enableRecoParams(true); - // calibhandler->enableFEEDCS(true); + calibhandler->enableFEEDCS(true); calibhandler->defineInputSpecs(inputs); return o2::framework::DataProcessorSpec{"EMCALRawToCellConverterSpec", From 7ae3ac0716ee04a1e30e858552f82fb2ba7f7926 Mon Sep 17 00:00:00 2001 From: Martin Poghosyan Date: Wed, 26 Apr 2023 16:16:59 +0200 Subject: [PATCH 2/2] [EMCAL-834] Checking active links per trigger --- .../workflow/src/RawToCellConverterSpec.cxx | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx b/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx index ec05c451221c8..4f556e7e78238 100644 --- a/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx +++ b/Detectors/EMCAL/workflow/src/RawToCellConverterSpec.cxx @@ -119,7 +119,7 @@ void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) // must be 0x307FFFDFFFFF if all links are active std::bitset<46> bitSetActiveLinks((list1.to_ullong() << 32) + list0.to_ullong()); // container with BCid and feeID - std::unordered_map> bcFreq; + std::unordered_map> bcFreq; double timeshift = RecoParam::Instance().getCellTimeShiftNanoSec(); // subtract offset in ns in order to center the time peak around the nominal delay constexpr auto originEMC = o2::header::gDataOriginEMC; @@ -181,12 +181,6 @@ void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) auto feeID = raw::RDHUtils::getFEEID(header); auto triggerbits = raw::RDHUtils::getTriggerType(header); - ULong64_t BCcoll = ULong64_t(triggerBC) + ULong64_t(triggerOrbit * 3564); - bcFreq[BCcoll].set(feeID, true); - - // std::cout << "__ BCcoll=" << BCcoll << " FEEID=" << feeID << std::endl; - // LOG(info) << "__ BCcoll=" << BCcoll << " FEEID=" << feeID << std::endl; - int correctionShiftBCmod4 = 0; o2::InteractionRecord currentIR(triggerBC, triggerOrbit); // Correct physics triggers for the shift of the BC due to the LM-L0 delay @@ -201,6 +195,9 @@ void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) continue; } } + + bcFreq[currentIR.toLong()].set(feeID, true); + // Correct the cell time for the bc mod 4 (LHC: 40 MHz clock - ALTRO: 10 MHz clock) // Convention: All times shifted with respect to BC % 4 = 0 for trigger BC // Attention: Correction only works for the permutation (0 1 2 3) of the BC % 4, if the permutation is @@ -358,10 +355,9 @@ void RawToCellConverterSpec::run(framework::ProcessingContext& ctx) mOutputTriggerRecords.emplace_back(interaction, currentevent.getTriggerBits(), eventstart, ncellsEvent + nLEDMONsEvent); } - std::unordered_map>::iterator p; - for (p = bcFreq.begin(); p != bcFreq.end(); p++) { - if (p->second != bitSetActiveLinks) { - LOG(error) << "Not all EMC active links contributed in global BCid=" << p->first << ": mask=" << (p->second ^ bitSetActiveLinks); + for (const auto& [globalBC, activelinks] : bcFreq) { + if (activelinks != bitSetActiveLinks) { + LOG(error) << "Not all EMC active links contributed in global BCid=" << globalBC << ": mask=" << (activelinks ^ bitSetActiveLinks); mOutputCells.clear(); mOutputTriggerRecords.clear(); mOutputDecoderErrors.clear();