diff --git a/_data/docs.yml b/_data/docs.yml index a4e28152..04140b6d 100644 --- a/_data/docs.yml +++ b/_data/docs.yml @@ -7,7 +7,6 @@ - overview/ROS_2_feature_comparison - overview/docker_ci_status - overview/users_and_clients - - overview/fiware_interoperability - title: Client Library @@ -43,6 +42,10 @@ - concepts/benchmarking/results - concepts/benchmarking/memo_prof +- title: Interoperability with FIWARE + docs: + - concepts/fiware_interoperability + - title: Core Tutorials docs: - tutorials/core/overview diff --git a/_docs/concepts/benchmarking/memo_prof/index.md b/_docs/concepts/benchmarking/memo_prof/index.md index 13f1c22d..7ca16986 100644 --- a/_docs/concepts/benchmarking/memo_prof/index.md +++ b/_docs/concepts/benchmarking/memo_prof/index.md @@ -1,7 +1,6 @@ --- title: Memory profiling redirect_from: /memo_prof/ -redirect_from: /concepts/memo_prof/ permalink: /docs/concepts/benchmarking/memo_prof/ --- diff --git a/_docs/overview/fiware_interoperability/imgs/soss.png b/_docs/concepts/fiware_interoperability/imgs/soss.png similarity index 100% rename from _docs/overview/fiware_interoperability/imgs/soss.png rename to _docs/concepts/fiware_interoperability/imgs/soss.png diff --git a/_docs/overview/fiware_interoperability/index.md b/_docs/concepts/fiware_interoperability/index.md similarity index 98% rename from _docs/overview/fiware_interoperability/index.md rename to _docs/concepts/fiware_interoperability/index.md index 1275226b..47810978 100644 --- a/_docs/overview/fiware_interoperability/index.md +++ b/_docs/concepts/fiware_interoperability/index.md @@ -1,6 +1,6 @@ --- title: Interoperability with FIWARE -permalink: /docs/overview/fiware_interoperability/ +permalink: /docs/concepts/fiware_interoperability/ --- ## Motivation @@ -33,7 +33,7 @@ To accomplish this, two different approaches can be taken: While the first approach might result in a more lightweight tool, it has several flaws, for instance a more difficult maintenance and the incapability of communicating with any other middleware, rather than ROS2 or micro-ROS. On the other hand, using an integration service platform, such as [SOSS](https://github.com/eProsima/soss_v2), enables automatically the possibility of communicating with a wide (and growing) set of middlewares, if their System Handle implementation is available. -## SOSS: System Of Systems Synthesizer +## SOSS: System-Of-Systems-Synthesizer **SOSS** addresses the task of providing a common interface for communicating software platforms that speak different languages. It is composed of a **core** library, which defines a set of abstract interfaces and provides some utility classes to form a plugin-based framework. @@ -50,7 +50,7 @@ This common representation is provided, user-wise, using IDL definitions, which -## SOSS-FIWARE system handle +## SOSS-FIWARE System Handle The [FIWARE System Handle](https://github.com/eProsima/SOSS-FIWARE/tree/feature/xtypes-support) allows bringing information from and to FIWARE's Context Broker into the SOSS world. This [System Handle](https://soss.docs.eprosima.com/en/latest/sh_creation.html) is configured and launched in the same way as any SOSS System Handle. diff --git a/_docs/overview/ROS_2_feature_comparison/index.md b/_docs/overview/ROS_2_feature_comparison/index.md index 24bc4c6e..b23cbca4 100644 --- a/_docs/overview/ROS_2_feature_comparison/index.md +++ b/_docs/overview/ROS_2_feature_comparison/index.md @@ -68,7 +68,7 @@ Support for "bare-metal" microcontrollers | ✓✓∘ | Currently, the CI for micro-ROS is distributed to GitHub and GitLab. *Until the end of 2020, all CI should be moved migrated completely to the new CI actions of GitHub.* Please note that those packages that are released for standard ROS 2 are also built and tested on [build.ros2.org](http://build.ros2.org/). Documentation | ✓ | High-level documentation at [micro-ros.github.io](https://micro-ros.github.io/). For detailed information please consult the README.md files in the relevant micro-ROS repositories at [github.com/micro-ROS/](https://github.com/micro-ROS/). For information on the middleware implementation, take a look at the [Micro XRCE-DDS documentation](https://micro-xrce-dds.docs.eprosima.com/en/latest/). Peer-to-peer functionality | ✓∘ | Prototypical peer-to-peer functionality implemented over broadcast. No QoS available for the moment. *Roadmap: improve prototype to achieve true point-to-point connection.* -Memory footprint | ✓ | A comprehensive profiling of the memory consumption of typical micro-ROS applications can be found [here](https://micro-ros.github.io/docs/concepts/memo_prof/). +Memory footprint | ✓ | A comprehensive profiling of the memory consumption of typical micro-ROS applications can be found [here](/docs/concepts/benchmarking/memo_prof/). Below, you can find the legend of the symbols used in the tables above. diff --git a/_docs/overview/hardware/index.md b/_docs/overview/hardware/index.md index 99c963fa..69937026 100644 --- a/_docs/overview/hardware/index.md +++ b/_docs/overview/hardware/index.md @@ -30,7 +30,7 @@ permalink: /docs/overview/hardware/ Micro-ROS aims to **bring ROS 2 to a wide set of microcontrollers** to allow having first-class ROS 2 entities in the embedded world. -The main targets of micro-ROS are mid-range 32-bits microcontroller families. Usually, the minimum requirements for running micro-ROS in an embedded platform are memory constraints. Since memory usage in micro-ROS is a complex matter we provide a [complete article](https://micro-ros.github.io/docs/concepts/memo_prof/) describing it and a tutorial on [how to tune the memory consuption](https://micro-ros.github.io/docs/tutorials/core/microxrcedds_rmw_configuration/) in the micro-ROS middleware. +The main targets of micro-ROS are mid-range 32-bits microcontroller families. Usually, the minimum requirements for running micro-ROS in an embedded platform are memory constraints. Since memory usage in micro-ROS is a complex matter we provide a [complete article](/docs/concepts/memo_prof/) describing it and a tutorial on [how to tune the memory consuption](https://micro-ros.github.io/docs/tutorials/core/microxrcedds_rmw_configuration/) in the micro-ROS middleware. In general micro-ROS will need MCUs that have tens of kilobytes of RAM memory and communication peripherals that enable the micro-ROS [Client to Agent communication](https://micro-ros.github.io//docs/overview/features/). diff --git a/_includes/docs_nav.html b/_includes/docs_nav.html index 27c84a83..ab7752ad 100644 --- a/_includes/docs_nav.html +++ b/_includes/docs_nav.html @@ -19,6 +19,9 @@ {% if page.path contains "_docs/concepts" and section.title == "Benchmarking" %} {% assign should_show_this_menu = true %} {% endif %} + {% if page.path contains "_docs/concepts" and section.title == "Interoperability with FIWARE" %} + {% assign should_show_this_menu = true %} + {% endif %} {% if page.path contains "_docs/tutorials" and section.title contains "Tutorials" %} {% assign should_show_this_menu = true %} {% endif %}