[AMDGPU] m107, m120, m127, m139, m154 are invalid.

[carlobertolli]

Preserving NaN sign is not required by nay standards. The compiler uses this property to fold FNEG into operand modifier for VOP3. Disabling such folding prevents formation of FMAs, amongst other optimizations, and has a performance impact. For discussion, see
llvm/llvm-project#201440

---

Note

Low Risk
README-only catalog updates; no build, runtime, or compiler behavior changes.

Overview
Updates the AMDGPU bugs found table in amdgpu/README.md only—no LLVM or fuzzer code changes.

Reclassified as invalid (not compiler bugs): m107, m120, m127, m139, and m154 now show ✅ on all three toolchain columns (ROCm 7.2.3, LLVM HEAD, ROCm HEAD), meaning the differential reproducer no longer treats them as -O0/-O2 mismatches. Descriptions add that NaN sign differences from folding fneg into VOP3 operand modifiers are acceptable (no standard mandates NaN sign) and that blocking those folds would hurt performance (e.g. FMA formation); rationale points to llvm/llvm-project#201440. m120, m127, m139, and m154 cross-reference m107 with “INVALID: see m107.”

Other table tweaks: m138 (v_bitop3 revert missing return) goes from ✅/❌/❌ back to ❌/❌/❌ on all columns. m140’s first status cell becomes ❌❌ (likely a typo vs a single ❌).

^{Reviewed by Cursor Bugbot for commit 5b76823. Bugbot is set up for automated code reviews on this repo. Configure here.}